Abstract

The mechanical softening of conventional rigid electronics and their power sources provides a high degree of design freedom, presenting an opportunity to develop self-powered wearables. This tutorial delves into sustainable self-powered wearable electronics, a field that integrates technology with soft electronics and energy harvesters. These are crucial for creating wearables that operate autonomously and minimize environmental impact. The presentation will address key challenges related to materials, system integration, and processing, offering a balanced perspective between theoretical insights and practical applications. Additionally, the tutorial will introduce 3D printing technologies, which have gained significant attention in fabricating customized soft electronics. The advantages of 3D printing, such as its non-vacuum, low-temperature, and non-contact processing capabilities, make it particularly suited to this innovative field.

Bio

Prof. Seungjun Chung received his B.S. degree in the School of Electrical Engineering from Korea University in 2006, followed by a Ph.D. degree in the Department of Electrical Engineering and Computer Science (EECS) from Seoul National University, Republic of Korea in 2012. Then, he joined Prof. Subramanian’s group in Dept. EECS, University of California, Berkeley as a postdoctoral researcher. He was a Principal Research Scientist at Korea Institute of Science and Technology (KIST) from 2017 to 2023, and he is now an associate professor in the School of Electrical Engineering at Korea University, Korea. Dr. Chung was a KIST Young Fellow and expert in technology-level evaluation at the Ministry of Science and ICT, Korea. His research interests include free-form electronic/energy devices based on additive manufacturing and printed nanoelectronic devices.

Abstract

The escalating demand for high-performance semiconductor chips has intensified interest in heterogeneous integration, with high bandwidth and multifunctionality as key objectives. This tutorial first introduces the recent advances in advanced packaging technologies for various applications including chiplet, fanout, and antenna-in-package. Traditional interconnect processes, such as through-silicon vias (TSVs), redistribution layers (RDLs), and Cu pillars, significantly contribute to the cost and complexity of advanced packaging due to intricate steps like photolithography and etching. In the next half, this tutorial introduces a novel method utilizing 3D printing technology to fabricate substrates with embedded through-holes, thereby eliminating the need for through-hole etching processes. We believe that the additive manufacturing can support the continued evolution of high-performance chips by simplifying interconnect fabrication, meeting the demands for higher I/O density and shorter interconnects central to advanced packaging technologies.

Bio

Prof. Jimin Kwon is an assistant professor in the Department of Electrical Engineering at Ulsan National Institute of Science and Technology (UNIST). He earned his MS and PhD degrees from Pohang University of Science and Technology (POSTECH), focusing on RF/analog integrated circuit design and thin film transistors, respectively. Previously, he conducted postdoctoral research at Stanford University, exploring advanced upper-layer logic devices utilizing low-dimensional and oxide semiconductor materials. His current research focuses on the development of heterogeneous integration technologies including monolithic 3D integration of novel semiconductor devices and advanced packaging